Track 3 - Architectures and Accelerators
CHAIRS
- Marco Danelutto, University of Pisa, Italy
- Ivy Peng, KTH Royal Institute of Technology, Sweden
Program Committee
- José L. Abellán, Universidad de Murcia, Spain
- Boma Anantasatya Adhi, RIKEN Center for Computational Science, Japan
- Jorge G. Barbosa, University of Porto, Portugal
- Davide Bertozzi, University of Manchester, United Kingdom
- Juan M. Cebrian, University of Murcia, Spain
- Teresa Cervero, Barcelona Supercomputing Center, Spain
- Manuel F. Dolz, Universitat Jaume I, Spain
- Toshio Endo, Institute of Science Tokyo, Japan
- Jesus Escudero-Sahuquillo, University of Castilla-La Mancha, Spain
- Pedro Javier Garcia, Universidad de Castilla-La Mancha, Spain
- Vladimir Getov, University of Westminster, United Kingdom
- Tanja Harbaum, ITIV, Karlsruhe Institute of Technology, Germany
- Christoph Kessler, Linköping University, Sweden
- Benjamin Klenk, NVIDIA, USA
- Ryohei Kobayashi, Institute of Science Tokyo, Japan
- Kazuhiko Komatsu, Tohoku University, Japan
- Hatem Ltaief, King Abdullah University of Science and Technology, Saudi Arabia
- George Michelogiannakis, KTH Royal Institute of Technology, Sweden
- Agustin Navarro Torres, University of Murcia, Spain
- Mattias O'Nils, Mid Sweden University, Sweden
- Marcus Paradies, LMU Munich, Germany
- Dirk Pleiter, University of Groningen, The Netherlands
- Christian Plessl, Paderborn University, Germany
- Julio Sahuquillo, Universitat Politècnica de València, Spain
- Kazem Shekofteh, Heidelberg University, Germany
- Shinji Sumimoto, University of Tokyo, Japan
- Keita Teranishi, Oak Ridge National Laboratory, USA
- Christian Terboven, RWTH Aachen University, Germany
- Samuel Thibault, LaBRI, Université Bordeaux 1, France
- Tomohiro Ueno, RIKEN, Japan
- Roman Wyrzykowski, Czestochowa University of Technology, Poland
- Kazutomo Yoshii, Argonne National Laboratory, USA
- Andreas Diavastos, Cyprus University of Technology, Cyprus
- Holger Froening, Heidelberg University, Germany
- Esteban Mocskos, University of Buenos Aires, Argentina
- Oscar Plata, University of Malaga, Spain
- Antonino Tumeo, Pacific Northwest National Laboratory, USA
- Yoshiki Yamaguchi, University of Tsukuba, Japan
- Guillermo Botella Juan, Complutense University of Madrid, Spain
- Toshihiro Hanawa, University of Tokyo, Japan
- Rohit Prasad, CEA, France
- Xing Cai, Simula Research Laboratory, Norway
FOCUS
- Architectures for instruction-level and thread-level parallelism
- Manycores, multicores, accelerators, domain-specific and special-purpose architectures, reconfigurable architectures
- Cloud and HPC storage architectures and systems
- Memory technologies and hierarchies
- Exascale system designs; data center and warehouse-scale architectures
- Novel big data architectures
- Parallel I/O and storage systems
- Power-efficient and green computing systems
- Resilience, security, and dependable architectures
- Software architectures spanning Edge, Cloud, HPC, and the computing continuum
- Processing in memory and near-memory processing
- Interconnect/memory architectures
- Post-Moore systems: neuromorphic, quantum, hybrid